| Subdirectories | |||
|---|---|---|---|
| https: | display | ||
| Files | |||
| 11week.doc | display | ||
| 11week.mpp | display | ||
| Bill.xls | display | ||
| Bulk Mail Link | display | ||
| Conf_paper.doc | display | ||
| DataSheets.zip | display | ||
| Home | display | ||
| Input | display | ||
| Issues&solutions.doc | display | ||
| Output | display | ||
| P07301 Project Proposal Document | display | ||
| P07301 Project Proposal Document.doc | display | ||
| Power | display | ||
| Project Readiness Package | display | ||
| Project Summary.pdf | display | ||
| ProjectReadinessPackage.doc | display | ||
| SD II 11 Week Plan.doc | display | ||
| Software | display | ||
| Test Plan.doc | display | ||
| chart_voltages.jpg | display | ||
| connectors.xls | display | ||
| cpld_pc104_status.doc | display | ||
| cpld_pinout.xls | display | ||
| cpld_sim.zip | display | ||
| cpld_synth.zip | display | ||
| daq.c | display | ||
| daq.jpg | display | ||
| daq_block.doc | display | ||
| db.doc | display | ||
| initial_diagram.jpg | display | ||
| input_parts.xls | display | ||
| input_pcb.zip | display | ||
| input_results.doc | display | ||
| input_spice.zip | display | ||
| input_status.doc | display | ||
| input_subsystem.doc | display | ||
| input_test.doc | display | ||
| io.doc | display | ||
| new.doc | display | ||
| output_current_loop.zip | display | ||
| output_current_test.xls | display | ||
| output_pcb.zip | display | ||
| output_timing.vsd | display | ||
| poster.ppt | display | ||
| power_layout.zip | display | ||
| power_library.zip | display | ||
| power_schematic.zip | display | ||
| power_status.doc | display | ||
| roles.xls | display | ||
| seminar.xls | display | ||
| sigcond.doc | display | ||
| summary.doc | display | ||
| testing of output logic.pdf | display | ||
| testing.pdf | display | ||
| voltage_conditioning_tips.doc | display | ||
| xx.doc | display | ||

