EDGE: Engineering Design Guide and Environment
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Project Information - P17342
Project Name:
|
P17342
|
Project Description:
|
IC Test Bed for Electronics Lab
|
Project track:
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Systems and Controls
|
DPM (Planning) term:
|
|
SD1 (Starting) term:
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|
SD2 (Ending) term:
|
|
Description:
|
|
Project's membership
User name
|
admin
|
curator
|
editor
|
facultystaff
|
grader
|
guest
|
observer
|
restricted
|
btl6309
|
no
|
no
|
yes
|
no
|
no
|
yes
|
yes
|
no
|
btm1307
|
no
|
no
|
yes
|
no
|
no
|
yes
|
yes
|
no
|
df3947
|
no
|
no
|
yes
|
no
|
no
|
yes
|
yes
|
no
|
eademe
|
yes
|
no
|
yes
|
no
|
no
|
yes
|
no
|
no
|
gbseee
|
no
|
no
|
yes
|
no
|
no
|
yes
|
yes
|
no
|
hxm4180
|
no
|
no
|
yes
|
no
|
no
|
yes
|
yes
|
no
|
mth7650
|
no
|
no
|
yes
|
no
|
no
|
yes
|
yes
|
no
|
ndg3986
|
no
|
no
|
yes
|
no
|
no
|
yes
|
yes
|
no
|
zak1028
|
no
|
no
|
yes
|
no
|
no
|
yes
|
yes
|
no
|