P06513: Underwater Sensor
/public/

Home

Table of Contents

Underwater Acoustic Sensor Network

Project Members

Paul Tilghman

Stephen Mokey

James Byron

Andrew Sackett

Project began in Spring Quarter 05-06 and will finish in Fall Quarter 06-07

Purpose

Wireless communication is becoming more and more prevalent in our society. Existing wireless technology is only required to communicate through air, so RF is the preferred medium. However, if communication underwater is desired, a different approach must be taken.

Underwater wireless communication is accomplished through the use of acoustic signals. The purpose of this project is to create two nodes with the ability to transmit sensor data wirelessly underwater, using an acoustic channel. Because this is a relatively new area of development, the project will be treated as a proof-of-concept; that is, the desired result is simply to show that it is possible to use an acoustic channel to communicate underwater, and to explore what problems we encounter when trying to implement an underwater wireless solution.

There are various reasons that one might wish to communicate wirelessly underwater. It is not always convenient to have wired communications: it makes deployment more difficult, distances are limited by the physical length of the cable, and there is the risk of damage to the connection. It also makes communicating with a moving object much more difficult, as the cable length must be adjusted and the area of travel is extremely limited. Wireless communication technology would give underwater vehicles, sensors, or divers the same freedom of range, location, and movement that wireless technology using RF gives us on land.

Objectives

As previously stated, this project is a proof-of-concept creation. Because of this, our objectives are merely a bare minimum of functionality for the prototype.

The speed of the connection is another consideration, but we decided that we are more interested in reliability than speed, so a metric is not listed. The data rate will be tuned for maximum reliability, and as such, successful data transmission at any speed is sufficient for scope of this project.

Design

There are two main components to this project: the hardware component, which consists of the amplifiers, level detectors, transducers, and microprocessor board, and the software component, which includes modulation and demodulation routines, packet manipulation and network protocol, timers to trigger data transmission, and access to the sensor ADCs.

Hardware

The microprocessor used in each node is a Microchip dsPIC33FJ256GP710, which is a 16-bit digital signal processor. The chip is inserted into a demo board containing ADC, DAC, and serial peripherals.

Each board has two transducers with proper amplification connected to an ADC for incoming signals and a DAC for outgoing signals.

Each board's sensors are also connected to ADCs to convert the analog voltage measurement into a digital value.

Software

The software subsystem performs all the manipulation of signals and sensor data. Signals coming in through the ADC are sent through a matched filter to determine where each symbol begins in the buffer, and are then demodulated using an FFT operation to determine which symbol is in the buffer.

Data packet transmissions are triggered every 5 minutes using a timer ISR. The packet is created in memory, and then the modulation routine sends out the packet as a signal to the receiver. After the receiver detects the incoming packet, it is demodulated back into the original packet.

After the signal is demodulated, the packet is checked for correctness and then analyzed to see which command must be performed using the data it contains. Two types of packets are currently possible: a data transmission packet, containing sampled data from the sensors, and an acknowledgement packet, telling the sender that the data packet has been received correctly. Each is sent with a 4-bit CRC for error detection. The CRC is computed before sending an inserted into the packet, and then recomputed after it is received. If the two CRCs match, there is a 94% chance that the packet is error free.

Implementation

The design was implemented using the above boards, constructed hardware, and software. Pictures of the components and finished test setup are available below.

Test Setup

Microcontroller Board

Files

Preliminary Design Review (MS Word document)

Preliminary Design Review Slides (PowerPoint slides)

Conference Paper (MS Word document)