P09311: Interface for driver/DAQ system
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Project Overview

The goal of this Multi-Disciplinary Senior Design Project (MSD) is to investigate and implement reliable interface for an FPGA based multi-purpose driver/data acquisition system which has been developed in MSD P08311. This project will involve design of a graphical user interface (GUI) run on a PC computer; evaluation and implementation of different communication channels between PC and FPGA e.g. USB and Bluetooth; implementing new control modules for driver/data acquisition subsystems.

See Planning Header below for more details.

Administrative Information

Project Name
Interface for Multi-purpose Driver/ Data Acquisition System
Project Number
P09311
Project Family
Modular, Scalable, Open Architecture Controls Systems
Track
Autonomous Systems and Controls
Start Term
2008-1
End Term
2008-3
Faculty Guide
Prof. George Slack (EE)
Primary Customer
Dr. Marcin Lukowiak (CE)
Customer contact information
RIT Computer Engineering Dept
Dr. Marcin Lukowiak
mxleec@rit.edu
(585)475-2808

Team Documents

Team Organizational Chart

1-Page Project Summary

2-Quarter Milestones

MSD II Schedule

Initial Customer Requirement Documentation

Project Readiness Package

Progress Reports

Planning

Risk Assessment (MSDI)

Risk Assessment (MSDII)

Test Plan

Assembly Plan

Concept Development

Customer Needs

Project Specifications

Concept Generation and Selection

Final Product

Bill of Materials

Hardware Guide

DAQ Board

Photo Gallery

Testing Results

Recommendations for Future Teams

Tutorials

Microsoft Visual Studio 2008 Tutorial

System.IO.Ports Tutorial

Bluetooth Tutorial

DAQ WorkStation Tutorial

Published Documents

System-Level Design Review (MSD I)

Detailed Design Review (MSD I)

Managerial Design Review Presentation (MSD I)

Technical Conference Publication (MSD II)

Imagine RIT Poster Publication (MSD II)

Poster Publication (MSD II)

Managerial Design Review Presentation (MSD II)