P11022: VAD Reduction of Wired Content for Signal and Power Transmission

Wrap-Up Documentation

Wrap-Up Documentation Contents

1. Electronics Explanation

2. Files of current circuit

a. Gerber file (existing) – exported from mentor PADS Internal External
b. Existing IC PADS schematic Internal.pdf External.pdf– opened and worked with Mentor PADS
c Summary of progress in PCB, as deviating from schematic
d. Digital Logic schematic for working system
Schematic Image
e. Digital Logic schematic files featuring counter
Schematic Image
f. Supporting components (ADC, DAC, PWM, ) Drawing, inside
g. Supporting components (ADC, DAC, PWM, ) Drawing, outside
Components Document#1
Component Document#2
List of changes

3. Testing of current circuit

a. Timing Picture from simulation done via Altera Quartus
b. Document of Signals

4. Technical Conference Publication

5. Recommendations

a Recommendations for continuing project
b. Resommendations for Future Project Combined
d. Procedural Recommendations to future teams

6. Success and Failures