P15452: Universal Wired Data Recorder
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Project Summary Project Information

Our project is a universal analog data recorder.

The device acquires and stores three channels of high-resolution analog data at a programmable sample rate from 1Hz to 10kHz. The analog sampling voltage range can be configured for either 0V to 5V or -24V to +24V.

The projected battery life is approximately 24 hours, however if recording at a high sample rate, the internal micro-SD card storage will be filled before the battery drains.

The device is compact with dimensions of 2.6"x 2.6"x 1.6". However, this small size does not compromise its ruggedness. There are internal vibration dampers and all case components are rated for IP-67 dust and water ingress protection. The electronics are capable of withstanding elevated temperatures, but the internal Lithium-Polymer battery limits safe operation to 60C.

Two 2nd revisions DAQ were designed to improve on the minor flaw of the 1st revision. Same case, connectors, and buttons were used kept the same due to satisfactory performance. Hardware was added to fix SD card issues from Rev 1. Firmware was changed to accommodate the new hardware. Placement of components were adjusted for better clearance.

The final product will be accompanied by a detailed set of schematics, drawings, firmware code, and a comprehensive report.

Design Documents Folder

Device Electronics Rev. A

Device Electronics Rev. A

Lucas Sychtysz, Kyle Smith, Sven Opdyke, Louis Amezquita

Lucas Sychtysz, Kyle Smith, Sven Opdyke, Louis Amezquita

public/Photo Gallery/sponsor.jpg
Project Name
Universal Wireless Data Recording Device
Project Number
P15452
Start Term
2141
End Term
2145
Faculty Guide
Bill Nowak
Primary Customer
Jason Kolodziej - jrkeme@rit.edu
Sponsor (financial support)
Dresser-Rand - James Sorokes

Team Members

Member Role Contact
Lucas Sychtysz Mechanical Engineer las3332@rit.edu
Stephen "Sven" Opdyke Computer Engineer seo7882@rit.edu
Louis Amezquita Electrical Engineer lxa3894@gmail.com
Kyle Smith Electrical Engineer kes2887@rit.edu
MSD I & II MSD I MSD II

Photo Gallery

Planning & Execution

Gate Reviews

Problem Definition

Systems Design

Detailed Design

Build, Test, Document

Publications & Presentations


Planning & Execution | Problem Definition | Systems Design | Detailed Design | Build, Test, Document | Publications & Presentations | Photo Gallery | Weekly Progress Reports