P17311: Radio-IP Hotspot Transceiver
/public/

Detailed Design

Table of Contents

Team Vision for Detailed Design Phase

Primary goal of this phase of the project was to complete the PCB layout for each sub-systems. This goal is achieved and the boards are ready to be send out for construction. We hope to get the printed circuit board by the time we get back from winter break in January.

Progress Report

Our plans for thanksgiving break included the following:

We have all had our board designs reviewed by other group members, and have used any feedback received to finalize our designs. We have also come up with a plan for the winter break, which we will get to later in the presentation.

The only task that remains to be finished before break is:

Prototyping, Engineering Analysis, Simulation

Iterative activities to demonstrate feasibility, including assumptions you made in your analyses or simulations. Have you completed sufficient analysis to ensure that your design will satisfy requirements? Have you included all usage scenarios in your modeling?

Drawings, Schematics, Flow Charts, Simulations

System Block Diagram

public/Systems%20Level%20Design%20Documents/BlockDiagram1.png

USB Power Subsystem

public/Systems%20Level%20Design%20Documents/power_chart.png

data sheet

https://edge.rit.edu/edge/P17311/public/Detailed%20Design%20Documents/Schematics/schematic_power.png https://edge.rit.edu/edge/P17311/public/Detailed%20Design%20Documents/Schematics/schematics_power.png

https://edge.rit.edu/edge/P17311/public/Detailed%20Design%20Documents/Schematics/vout_3_3.png

https://edge.rit.edu/edge/P17311/public/Detailed%20Design%20Documents/Schematics/vout_5.png

https://edge.rit.edu/edge/P17311/public/Detailed%20Design%20Documents/Schematics/pcb_layout_power.png

https://edge.rit.edu/edge/P17311/public/Detailed%20Design%20Documents/Schematics/PCB_layout_3D.png

USB Hub/Serial Subsystem

public/Systems%20Level%20Design%20Documents/BlockDiagram_USBHub_Serial2.png

https://edge.rit.edu/edge/P17311/public/Detailed%20Design%20Documents/Schematics/usbBreakoutSchematic.pdf/USB-Breakout.pdf https://edge.rit.edu/edge/P17311/public/Detailed%20Design%20Documents/usbBreakoutSch.png

https://edge.rit.edu/edge/P17311/public/Detailed%20Design%20Documents/usbBreakoutPCB.png

https://edge.rit.edu/edge/P17311/public/Detailed%20Design%20Documents/usbBreakout3D.png

USB Audio Subsystem

public/Systems%20Level%20Design%20Documents/USBAudioSubsystem_BlockDiagram.png

public/Detailed%20Design%20Documents/Schematics/USBAudio_schematic.png

public/Detailed%20Design%20Documents/Schematics/USBAudio_PCB.png

public/Detailed%20Design%20Documents/Schematics/USBAudio_PCB_3D.png

Radio

public/Detailed%20Design%20Documents/Schematics/RFsch.png

public/Detailed%20Design%20Documents/Schematics/RFPCB.png

public/Detailed%20Design%20Documents/Schematics/RF3D.png

public/Detailed%20Design%20Documents/Schematics/RFsch.png

AF Filters (simulations)

public/Detailed%20Design%20Documents/Schematics/AF_filter_sim_schematic.PNG

public/Detailed%20Design%20Documents/Schematics/AF_filter_sim_BodePlot.PNG

public/Detailed%20Design%20Documents/Schematics/phase.PNG

Bill of Material (BOM)

The BOM is shown below. As of now we have ordered and received half of the things required for prototyping. The other half will be ordered this week once PCB layouts have been finalized.

public/Detailed%20Design%20Documents/purchasing.png public/Detailed%20Design%20Documents/BOM.png PurchasingSpreadsheet BOM Spreadsheet

Test Plans

We plan to test individual components once we build them. We have LEDs at all digital inputs and outputs to assist in signal tracing during troubleshooting. The test plans for each component are outlined below:

Input 12 volts; ensure that 5 volts & 3.3 volts show up on output. Test using a multimeter with active loads/high impedance (or large resistors).

Provide an audio input (e.g. white noise) with bandwidth wider than expected filter bandwidth. Check the audio output with a spectrum analyzer or re-input into computer sound card and perform FFT analysis to verify performance of band-pass filter. Ensure CM108 chip is powered via 5 volts from USB input.

Provide an audio input then observe the RF output with a spectrum analyzer to verify that spurious emissions are kept at a minimum and are within permissible bounds.

Plug in high throughput device into USB port. Plug in usb hub into computer. Actively use USB device. Verify no packet loss. Configure serial device to be loopback, high speed. Send text at high rate of speed through serial interface. Verify no loss of data.

Risk Assessment

public/Detailed%20Design%20Documents/risks.png

Live Document

Plans for next phase

public/Detailed%20Design%20Documents/Gant.png


Home | Planning & Execution | Imagine RIT

Problem Definition | Systems Design | Preliminary Detailed Design | Detailed Design

Build & Test Prep | Subsystem Build & Test | Integrated System Build & Test | Integrated System Build & Test with Customer Demo | Customer Handoff & Final Project Documentation