Table of Contents
Content from our Detailed Design phase can be found here: Detailed Design Documents
- Created schematics and top level electrical drawings
- Chose components
- Electrical simulations
- Feasibility analysis on electrical designs and components
- Created software flowchart
- Software Implementation of UI
- Compiled BOM
- Improve schematics
- Configuration process for new ICs
- Initial design of the case
- Initial PCB layout
- Operator Manual 1.0
Questions for Guide/Customer
- Feedback of the schematics submitted from the customer
When : 5/11/2017
Prototyping, Engineering Analysis, Simulation
1.) Current Measurement Feasibility
- It was decided that DUT pin current should be quantified as the current flowing into the positive rails of Op-Amps in the mass-interconnect subcircuits.
- To confirm the validity of this assumption, the circuit shown in the schematic below was created on a bread board.
- Two values of Vin were applied using a powersupply. Currents flowing through the resistors Rs and RL were calculated from the measured voltage drops across the respective resistors.
- The tests demonstrated that the measured currents and actual load currents were close. For example, current Is was found to be 19.6mA and IL was found to be 14.1mA in one of the tests.
2.) Mass Interconnect Voltage/Current Feasibility
- Voltage application for open, 1k ohms, and 555 ohms loads is tested. This shows that up to 22v at 40 mA can be provided.
- More testing is required to find maximum safe current.
3.) Iterative testing and verification of Power system simulations, Confirmed current reduction in inductors by increased load, tested shorting of output pins and effect on current and voltage so could be noted for testing, and confirmed stability of output voltages at high and low battery input levels. Updated power simulations:
4.) Manual prototype:
5.) Case desing prototype:
Drawings, Schematics, Flow Charts, Simulations
1.) Technical Drawings
- All schematics can be found here: Schematics
- All diagrams / flowcharts can be found here: Diagrams
- All CAD drawings can be found here: CAD
2.) Top Level Electrical Designs
- Below is a top level schematic of the major electrical subsystems:
- This schematic details the connections between the battery, chargerboard, main board (mass interconnect), microcontroller (MEGA 2560), and touchscreen (nexion LCD).
- Below is a schematic of the main board (Referred to as the mass interconnect in the above).
- Many of the components shown represent subcircuits in the design.
- This schematic outlines the electrical connections between subcircuits on the main PCB.
- Added updates to system diagrams to reflect changes, cleaned up diagrams.
- Power Block diagram: added latching and under voltage detection, eliminated schematics, etc.
- Testing/ Mass Interconnect- Updated to show added functionality and improve understanding of intended operation:
3.) Lower Level Electrical Designs
- There are schematics for each of the lower level subcircuits present in the Main Board Schematic.
- Below is a schematic for the mass interconnect subcircuit.
- This subcircuit corresponds to the mass interconnect components shown in the Main Board Schematic.
- This circuit isolates the DUT pin, applies voltage to the DUT pin, and samples the voltage at the DUT pin.
- Below is a schematic for the under voltage detection circuits
- These circuits send a signal to the microcontroller when the battery voltage or +24V supply voltage go below a certain level
4.) Software Flowcharts and config file specifications
- These flowcharts reflect currently implemented code which proves the capabilities of reading in sd card files, deciphering the config file, and setting up the screen accordingly.
Bill of Material (BOM)
- These are links to the production and development BOMs respectively:
- Test plans were developed for judging the ability of the prototype to satisfy engineering requirements and operate as intended
- Test plans are contained in the Requirements and Testing Spreadsheet: Requirements and Testing
- Below is the test plan for judging simplicity requirements
- IC specific connections and steps that will be used are detailed and compiled into test plans. The IC test plans can be found here:
- Relevant risks were added.
- Irrelevant risks were removed.
- Risk assessment link:
Plans for next phase
- As a team, what do you need to accomplish between now and the end of the semester:
- Items remaining from Detailed Design review. BOM production cost negotiation. PCB order for Power / PCB for design. Gantt Chart
- As a team, what do you need to do to prepare for MSD II:
- First Weeks (1-3): Ensure parts, Receive power supply and check / test. Receive all parts remaining, and check. Review of design from previous semester.Confirm design of main PCB and ordering. Resource checks/ scheduling. Make changes needed.
- Weeks 3+ Assemble mass interconnects. continue writing code and editing.
- Testing PCB week 5-8 + systems.
- Case around week 8.
- Checks of systems and reordering/ rebuild week 9
- Final tests week 9-12, Tech paper, poster, etc.
- Week 13-14 handoff.
- Here is our Gantt Chart for MSDII: Gantt Chart