P17342: IC Test Bed for Electronics Lab

Subsystem Build & Test

Table of Contents

Team Vision for Subsystem Level Build & Test Phase



Test Results Summary

Risk and Problem Tracking

Plans for next phase

Team goals for next phase:

Individual Goals:

Benjamin Lane:

Brian Mesolella:

Matt Hohman

David Froehlich

Hamza Masood

Home | Planning & Execution | Imagine RIT

Problem Definition | Systems Design | Preliminary Detailed Design | Detailed Design

Build & Test Prep | Subsystem Build & Test | Integrated System Build & Test | Integrated System Build & Test with Customer Demo | Customer Handoff & Final Project Documentation