. EDGE
P17342: IC Test Bed for Electronics Lab
/public/

Systems Design

Table of Contents

Team Vision for System-Level Design Phase

Our goals for this phase

Our goal during this phase was to get to the point where we have a solid system design to meet customer requirements with a reasonable understanding of possible advantages of different systems as well as their pitfalls (whether that be price, complexity, etc...)

Our Results for this phase

During this phase, we quantified and investigated the various systems that make up our tool.This was first done by identifying the various functions that would be required to meet the customer requirements. From this, we found the systems that would be tied together as can be seen in our block diagram.

Within these systems we were able to identify possible alternatives (like different power sources, UI, etc...) and compiled them into our Morph chart. After weighing various pros/cons in our feasibility analysis, we identified main contenders for each system and put them together into possible implementations.

Functional Decomposition

Updated Customer and Engineering Requirements:

Customer and Engineering Requirements

List of Functions and Subfunctions:

Initial Functional Decomposition:

top

Functional Decomposition 2nd Revision:

top

Benchmarking

Customer’s Objective: Quickly pass or fail ICs used in lab with a low cost IC tester. See design requirements for details. Current market products are either too costly or offer little flexibility in testing different chips. Concepts for comparison might include price, screen or LCD size, ease of use, number of testable ICs, and upgradability for use with newer ICs.

Commercially Available Products:

Universal IC Tester (Kitek Technologies)

Model 570A Analog IC Tester (BK Precision)

Chinese IC testers

The first two testers have more than enough functionality for use in the lab. Their cost, however makes them unsuitable for this purpose. The Chinese testers are significantly cheaper but offer limited testing functionality. It’s worth noting that purchasing two chinese testers would more than likely cover the functionality needed for the labs, but with no guarantee that future chips will be supported.

Concept Development

Feasibility: Prototyping, Analysis, Simulation

High level overview

Detailed feasibility document

Power System

Alkaline
Zinc-Carbon
Lithium
NiCD
NimH
Lithium-ion
Lithium ion or alkaline are the most reliable, portable, and hold charge.

Mass Interconnect

ADC/DAC directly connected to socket
MUX
FPGA
Needs to be tested further, DAC and ADC work well, may need to have more options with the MUX as well.

IC Interface

ZIF (Zero insertion force socket)
DIP
Jumper wires
Aligator Clips
ZIF is the best overall in terms of time, not damaging IC and options however the DIP is still an option especially if case is costly.

Control System

Raspberry Pi
Embedded Systems
ATMEGA2560
328p
M0/M0+
FPGA
Arduino platform is best in terms of simplicity and availability.

Input / Chip Selection

Numpad
Dedicated Button
Touchscreen
More testing and research needs to be done to select an optimal input method, Touch Screen and dedicated buttons seem to be the best, however each is limited, the touchscreen intuitively leads to touchscreen for display, buttons lead to LCD small screen.

UI Results / Display

Touchscreen UI
Character LCd
RGB led
User provided device (Android, windows, etc...)
More testing and research needs to be done to select an optimal display method. Touchscreen is intuitive if a touchscreen was used, LCD works as well, LED can be added tablet can be an option with app but is costly.

Casing/Enclosure

3d printed
No case
Commercially made
3d printed case is the best and the cheapest option as it can be constructed on campus for a few cents. Final decision will be made later between a shield and a 3D printed case.

Morphological Chart and Concept Selection

top

Concept Selection

This consists of two elements:

Initial Concept Screening chart

Concepts after Feasibility for analysis

Designs and Flowcharts

top

top

top

top

top

Risk Assessment

Updated Risk Assessment

Plans for next phase

David Froehlich:

1. Model components we are using for PCB design (1-2 hours, 3/31)

2. Solder SMD components to breakout boards (30 min, 3/24)

3. Roughly model case (20 min, 4/7)

4. Print out rough model (20 min, 4/7)

5. Outline dimensions of PCB (30 min, 4/7)

Matthew Hohman

1. Create breadboard design by 3/24 (2 hours).

2. Update top level block diagram by 3/31 (1 hour).

3. Update microcontroller block diagram by 3/31 (1 hour).

4. Update prototype BOM by 3/31 (0.5 hours).

5. Create production BOM by 3/31 (0.5 hours).

6. Develop preliminary test plan for PCB by 4/7 (2 hours).

Benjamin Lane

1. Update power block diagram

2. Start PCB block diagram

3. Start case design with dimensions

4. Start CAD design for case

5. Do a 3D print test/rough case print

6. Preliminary test plan for power system

Hamza Masood

1. Solder SMD components to breakout boards (30 min, 3/28)

2. Define PCB layers (20 min, 3/28)

3. PCB layout (5 hours, 3/30)

4. Breadboard prototype design (5-10 hours, 4/4)

5. Circuit Diagram (4 hours, 4/6)

Brian Mesolella

1. Breadboard prototype design (5-10hrs, week of 3/24)

2. Circuit Diagram (1hr, week of 3/24)

3. Connection of nets in Block Diagram(45min, week of 3/31)

4. Route nets for prototype in PCB layout (2hrs, week of 3/31)

5. Update block diagram (1hr, week of 3/31)

6. Develop preliminary test plan for mass interconnect (1hr, week of 4/7)

Nicolas Guerrero

1. Define PCB layers (20 min, 3/28)

2. Update block diagram (1hr, week of 3/31)

3. Route nets for prototype in PCB layout (2hrs, week of 3/31)

4. Connection of nets in Block Diagram(45min, week of 3/31)

5. Outline dimensions of PCB (30 min, 4/7)

6. Develop preliminary test plan for mass interconnect (1hr, week of 4/7)

Zachary Kruse

1. Preliminary UI and MicroController test plans. (1hr, week of 3/20)

2. Finalize UI and MicroController Block Diagrams (1hr, week of 3/20)

3. Software implementations for UI (4hr, week of 3/27)

4. Software implementations for Power control (4hr, week of 3/27)

5. Software implementations for Chip Testing (4hr, week of 3/27)


Home | Planning & Execution | Imagine RIT

Problem Definition | Systems Design | Preliminary Detailed Design | Detailed Design

Build & Test Prep | Subsystem Build & Test | Integrated System Build & Test | Integrated System Build & Test with Customer Demo | Customer Handoff & Final Project Documentation