P18262: Battery Health Management System
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Build & Test Prep

Table of Contents

Team Vision for Build & Test Prep Phase

Team 18262 Plans for Build and Test Prep Phase

Team 18262 left Senior Design 1 with a designed circuit board for the project. At the end of the detailed design review the circuit boards and all parts to populate them where purchased and ordered. At the beginning of this phase the parts arrived for the project. During this phase the teams goal is to begin testing and populating the boards. This will be done in two sections, splitting the project by the slave board and master board to more effectively work. The surface mount lab in the Slaughter Building. The team will be following the test plans written in the detailed design phase.

Team 18262 Progress for Build and Test Prep Phase

The team was able to complete the initial check out of the boards to compare the designs to the physical boards received. Care was taken to make sure all customer and engineering requirements were met, and that specifically the pack voltage input on the master board. The parts were started to be populated on the board following the test plans. Due to the earlier completion date by the teams customer, the goal is to have the boards populated and tested by February to allow the EVT firmware team to being testings.

Test Plan Summary

Test Plans

Test Plan Setup

Test Plan Setup

The test plans are laid out in a way to reduce errors in the population of the boards. The first step is to ensure that both the master and the slave boards have been manufactured correctly with a comprehensive checkout procedure. Once this has been passed, the initial population of the boards can start with the power supplies and connectors. After another test to ensure the boards have been created correctly, they are connected to power to provide an baseline before the remaining subsystems are populated.

Firmware test plans will not start until the first working prototypes of master and slave boards are created. In the meantime the firmware team will be working in alongside the rest of the team creating the code to allow a seamless transition from hardware validation to firmware validation.

For the Build and Test Prep phase, the main goals were to do the initial check out of the boards to ensure they have been created correctly by the manufacturing company. After this the boards will begin to be populated with subsystems.

A link to the Firmware test plans can be found here

A link to the Master test plans can be found here

A link to the Slave test plans can be found here

Test Plan Results to Date

Master Boards

Master tests plans have gone through a second iteration New iteration breaks apart test plans into sections

Completed

Example of completed test:

Manufacturing Tests

Manufacturing Tests

Next Plans to Start

Initial Population of Power (Not Started)

Voltage Plane / Ground Isolation (Not Started)

Subsections Population (Not Started)

Includes

Subsection Test (Not Started) Full Function Test (Not Started)

Master Board Images

BMS Master Image

BMS Master Image

Slave Boards

Slave Board Images

Slave Testing

Slave Testing

Design and Flowcharts

Functional Decomposition

Functional Decomposition

Risk and Problem Tracking

Risks from MSD 1

Risk Management, DDR

Risk Management, DDR

Risks Identified in Build and Test Prep

At the moment, no new risks have been identified and no risks have changed in severity. As the population of the boards begins and firmware implementation starts, there is ample opportunity to find more risk items, and to close out previous risks that have now been handled.

Risk Graph

Risk Graph

This figure shows the decreasing risk importance, which is the sum of the importance column in the risk table. This allows the team to track how the risks change over the course of the project.

Risk Table

Risk Table

Bill of Materials

A link to the BOM can be found here

Budget

A link to the most up to date budget excel file can be

Testing Standards Used

As part of the Advanced Circuits Sponsorship, the boards were designed based off the standards provided by Advanced Circuits to ensure functionality as well as reduce cost. This is accomplished by following the standards allowing the circuit cards to be produced easier.
 Advanced Circuits Requirements for boards

Advanced Circuits Requirements for boards

public/PDDR/ppihc.PNG

public/PDDR/ppihc.PNG

Pikes Peak International Hill Climb has a number of electrical standards which our team will need to consider when developing our REV2 motorcycle. Of those, two specific standards are extremely relevant to our project. Relevant Competition Standards “All exposed conductors operating at greater than 36V must be properly insulated and marked with ‘High Voltage’ signs”. “A separate fuse (not a circuit breaker) will be placed in series with the main battery and the rating will not exceed 200% of the maximum expected current draw. All low voltage taps from the main battery will be separately fused. All fuses must be placed first in series with the battery starting at the positive connection”. The first can be mitigated with proper enclosure design, in addition to careful labeling in the harness and on the PCB. The second has been considered in the selection of individual fuses on all of the battery management system measurement points. These regulations are important for ensuring the safety of all competitors in the electric vehicle class. A full pdf of the 2017 competition rules can be found here: PDDR/PPIHC_Rulebook.pdf

Design Review Materials

A link to the design review can be found here

Plans for next phase

Build and Test Prep Gantt Chart

Build and Test Prep Gantt Chart

Individual Plans Three week plans created after the last design review are here, and are compared to what was completed. The three week plan for the next section are also included.

Steve Titus - 3 Week Plan, Subsystem Build and Test - 3 Week Plan, Detailed Design Review

Ben Stewart - 3 Week Plan, Subsystem Build and Test - 3 Week Plan, Detailed Design Review

Will McCaffrey - 3 Week Plan, Subsystem Build and Test - 3 Week Plan, Detailed Design Review

Murali Prasad - 3 Week Plan, Subsystem Build and Test - 3 Week Plan, Detailed Design Review

Jacob Allison - 3 Week Plan, Subsystem Build and Test - 3 Week Plan, Detailed Design Review

Greg Malanga - 3 Week Plan, Subsystem Build and Test - 3 Week Plan, Detailed Design Review


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