P19361: Optoelectronic Guitar Pickup
/public/

Subsystem Build & Test

Table of Contents

Team Vision for Subsystem Level Build & Test Phase

This phase, the team plans on building both mechanical and electrical subsystems. For the mechanical side, the guitar will be routed and the pickups will be built. The electrical side will take care of debugging the board, and flashing software onto it. Once the board is verified to be working and the right software is flashed onto it, the electrical side is ready for integration with the pickup.

The mechanical system is near completion, but some work still needs to be done. The electrical system ran into problems with debugging the board, which is slowing progress on the software. The software has been written, but not tested since the board is not working properly yet.

Mechanical Update

The guitar has been routed, and all of the adjustment mechanisms have been made. As it stands, the reflective design is in working order. However, there is a bit of rework to do.

First, the rout is not perfectly center, it is about 1/16” off of center, and slightly rotated. To compensate for this, a new pickup plate will be made, with the holes shifted to the left 1/16”.

Reflective design offset

Reflective design offset

Reflective design adjustments

Reflective design adjustments

Second, the 3D printed L-brackets are not sufficient for the task, as the printer is not able to produce the chamfers evenly. These will need to be remade in aluminum

Third, the aluminum top bracket on the transmissive bridge bends from the force of the screws. This piece will be remade in stainless. It is possible to tighten the screws down only slightly, and not bend the bracket, so the part stays functional. Still, it would be better to remake the part in stainless, so it will require more force to bend.

Transmissive design on top of reflective

Transmissive design on top of reflective

Transmissive design closeup

Transmissive design closeup

Electrical Update

Hardware

While we have been able to talk to the PIC microcontroller, program it, and enter debug mode, we were not able to get any pass through or debug tone signals to work, which led us to believe we had some hardware issues. All power supplies were checked (+3.3 analog, +3.3 digital, +1.8 digital, -3.3 analog) and we found that the -3.3v analog rail was outputting +0.5v. We discovered a few issues, mainly that two capacitors were installed on their pads in the incorrect orientation and an inductor was lifted from its pad. The negative power supply now reads -3.0v, so we may have more debugging left to do in the power section of the board.

-3.3v rail schematic

-3.3v rail schematic

Another puzzling issue we have been having is with the power switch. When switching the board on, it will either turn on (power LED glows, board draws between 300 and 400 mA of current from the supply) or it will draw about 100 mA and not actually be on. When it is in the glitchy on state, it seems to think it is charging a battery even though it is not. The board turns on correctly every time when a bettery is connected to the board

Power input of schematic

Power input of schematic

Polling for a battery

Polling for a battery

We are able to see the 48 kHz clock (LRCLK) that controls the sampling rate.

48 KHz Clock Signal

48 KHz Clock Signal

We have also confirmed the 3.072 MHz clock (BCLK) that sends each bit of the data from the ADC:

3.072 MHz Clock Signal

3.072 MHz Clock Signal

Another thing that we have confirmed is that the input signal can get through the first set of op amps going into the DSP:

Picture of test set up

Picture of test set up

500 Hz Sine wave making it through the first Op Amp

500 Hz Sine wave making it through the first Op Amp

We have also been able to see digital data going out of the ADC and into the PIC. This leads us to believe that the problem we are having is with the DSP chip, which contains the ADC.

Software

The software has begun development. The first changes made were to add the encoder value to a distortion variable. This statement is placed in the main infinite while loop. The encoder value is set based on a series of interrupts when the encoder is turned clockwise or counter-clockwise, and the encoder value changes with this.

The distortion algorithm has not been implemented yet, as there needs to be confirmation that the ADC is sending the the 2 16-bit signals multiplexed. Once this is confirmed, then the distortion algorithm can be implemented. Since the signals are being sent every-other bit, there is a function created in the main file that will convert the multiplexed signal into two separate signals that can be distorted, called convert_channel_data.

The next changes consisted of setting the input toggle switch to the proper value. This switch varies the set of pickups selected, and the 2 bits that are set with the pickup selection are attached to 2 inputs on the PIC. This made for an easy equation to be setup after the distortion setting, which labels the selection to either 0, 1, or 2. This value is important when choosing the channel through the i2s.

The current changes cannot be tested yet, as the board is not working properly. This means that these changes cannot be confirmed as working or not working yet. Once the board runs David's pass-through audio software properly, the current changes can be programmed to the board and then be tested.

Here is a snapshot of the code changes.

MAIN

MAIN

The if statement that contains the writing and manipulation of characters is cascaded 3 times for each of the 3 input connectors, with the channel selection function choosing 1, 2, and 3 for each connector. The convert_channel_data function returns the single channel data that is to be manipulated.

PCB Update

All the gerber files have been imported from Altium to Eagle with minor discrepancies. Some work still needs to be done to rectify import errors, but this should not take long.

Top Layer (Signal) with VDD and Ground Layers

Top Layer (Signal) with VDD and Ground Layers

Top Layer (Signal) Only

Top Layer (Signal) Only

Bottom Layer (Signal) with VDD and Ground Layers

Bottom Layer (Signal) with VDD and Ground Layers

Bottom Layer (Signal) Only

Bottom Layer (Signal) Only

Upper Inner Layer (Ground)

Upper Inner Layer (Ground)

Lower Inner Layer (VDD)

Lower Inner Layer (VDD)

A few vias need to be added, and the dimensions need to be drawn. Otherwise, the import went smoother than expected.

Changes to be Made

The next 2 images below show the imported gerber file in Eagle for the bottom layer of the board as well as a picture of the physical bottom layer of the board. The layout in Eagle and the physical PCB should be identical for this part of the board. A quick inspection shows that this is not the case. This can most likely be attributed to an import error. For example, inductor L15 is missing as well as some other passive components. This will need to be fixed.

Bottom Layer Discrepancy

Bottom Layer Discrepancy

Bottom Layer of PCB

Bottom Layer of PCB

The photo below shows the layout around the DSP chip U14 on the top layer. A good way to check and see if the DSP is programmed and running correctly is by probing DSP_GPIO_3 (the second pin from the top on the left side of U14). When working correctly, this pin should be outputting a clock signal. To make this easier to test since the pins are so close together, a test point will be added near this pin. There will likely be other test points added as we continue to test the board, but this is one that we have discovered should be added to make debugging easier.

Test Point to be Added to U14 (DSP Chip)

Test Point to be Added to U14 (DSP Chip)

Risk and Problem Tracking

Updated Risk Assessment

Updated Risk Assessment

The board hardware is not working as expected. Troubleshooting this has been a long process so far, and it is taking a lot longer than we expected.

We are negating this risk by spending a lot of time with the hardware. We have found and corrected several issues with the power section of the board already, but we still do have a bit more to do.

Functional Demo Materials

This functional demo will show the mechanical system near completion and an update as to where the electrical system is with debugging the board. The software is ready to be flashed to the board for testing, however the software cannot be tested until the board is debugged and functioning.

Links to our functional demo are found below:

Plans for next phase

As a team, we hope to be done with the build completely by the end of this phase. This will mean the board being completely debugged, and the software programmed to the board, and the mechanical system will be fully built and integrated with the electrical system.

Here is a link to the 4-week individual plans.


Home | Planning & Execution | Imagine RIT

Problem Definition | Systems Design | Preliminary Detailed Design | Detailed Design

Build & Test Prep | Subsystem Build & Test | Integrated System Build & Test | Customer Handoff & Final Project Documentation